Module avx512dq

Available on x86 or x86-64 only.

Functions

vcvtpd2qq_128 🔒 ^⚠

vcvtpd2qq_256 🔒 ^⚠

vcvtpd2qq_512 🔒 ^⚠

vcvtpd2uqq_128 🔒 ^⚠

vcvtpd2uqq_256 🔒 ^⚠

vcvtpd2uqq_512 🔒 ^⚠

vcvtps2qq_128 🔒 ^⚠

vcvtps2qq_256 🔒 ^⚠

vcvtps2qq_512 🔒 ^⚠

vcvtps2uqq_128 🔒 ^⚠

vcvtps2uqq_256 🔒 ^⚠

vcvtps2uqq_512 🔒 ^⚠

vcvtqq2pd_128 🔒 ^⚠

vcvtqq2pd_256 🔒 ^⚠

vcvtqq2pd_512 🔒 ^⚠

vcvtqq2ps_128 🔒 ^⚠

vcvtqq2ps_256 🔒 ^⚠

vcvtqq2ps_512 🔒 ^⚠

vcvttpd2qq_128 🔒 ^⚠

vcvttpd2qq_256 🔒 ^⚠

vcvttpd2qq_512 🔒 ^⚠

vcvttpd2uqq_128 🔒 ^⚠

vcvttpd2uqq_256 🔒 ^⚠

vcvttpd2uqq_512 🔒 ^⚠

vcvttps2qq_128 🔒 ^⚠

vcvttps2qq_256 🔒 ^⚠

vcvttps2qq_512 🔒 ^⚠

vcvttps2uqq_128 🔒 ^⚠

vcvttps2uqq_256 🔒 ^⚠

vcvttps2uqq_512 🔒 ^⚠

vcvtuqq2pd_128 🔒 ^⚠

vcvtuqq2pd_256 🔒 ^⚠

vcvtuqq2pd_512 🔒 ^⚠

vcvtuqq2ps_128 🔒 ^⚠

vcvtuqq2ps_256 🔒 ^⚠

vcvtuqq2ps_512 🔒 ^⚠

vfpclasspd_128 🔒 ^⚠

vfpclasspd_256 🔒 ^⚠

vfpclasspd_512 🔒 ^⚠

vfpclassps_128 🔒 ^⚠

vfpclassps_256 🔒 ^⚠

vfpclassps_512 🔒 ^⚠

vfpclasssd 🔒 ^⚠

vfpclassss 🔒 ^⚠

vrangepd_128 🔒 ^⚠

vrangepd_256 🔒 ^⚠

vrangepd_512 🔒 ^⚠

vrangeps_128 🔒 ^⚠

vrangeps_256 🔒 ^⚠

vrangeps_512 🔒 ^⚠

vrangesd 🔒 ^⚠

vrangess 🔒 ^⚠

vreducepd_128 🔒 ^⚠

vreducepd_256 🔒 ^⚠

vreducepd_512 🔒 ^⚠

vreduceps_128 🔒 ^⚠

vreduceps_256 🔒 ^⚠

vreduceps_512 🔒 ^⚠

vreducesd 🔒 ^⚠

vreducess 🔒 ^⚠

_cvtmask8_u32^⚠Experimentalavx512dq

Convert 8-bit mask a to a 32-bit integer value and store the result in dst.

_cvtu32_mask8^⚠Experimentalavx512dq

Convert 32-bit integer value a to an 8-bit mask and store the result in dst.

_kadd_mask8^⚠Experimentalavx512dq

Add 8-bit masks a and b, and store the result in dst.

_kadd_mask16^⚠Experimentalavx512dq

Add 16-bit masks a and b, and store the result in dst.

_kand_mask8^⚠Experimentalavx512dq

Bitwise AND of 8-bit masks a and b, and store the result in dst.

_kandn_mask8^⚠Experimentalavx512dq

Bitwise AND NOT of 8-bit masks a and b, and store the result in dst.

_knot_mask8^⚠Experimentalavx512dq

Bitwise NOT of 8-bit mask a, and store the result in dst.

_kor_mask8^⚠Experimentalavx512dq

Bitwise OR of 8-bit masks a and b, and store the result in dst.

_kortest_mask8_u8^⚠Experimentalavx512dq

Compute the bitwise OR of 8-bit masks a and b. If the result is all zeros, store 1 in dst, otherwise store 0 in dst. If the result is all ones, store 1 in all_ones, otherwise store 0 in all_ones.

_kortestc_mask8_u8^⚠Experimentalavx512dq

Compute the bitwise OR of 8-bit masks a and b. If the result is all ones, store 1 in dst, otherwise store 0 in dst.

_kortestz_mask8_u8^⚠Experimentalavx512dq

Compute the bitwise OR of 8-bit masks a and b. If the result is all zeros, store 1 in dst, otherwise store 0 in dst.

_kshiftli_mask8^⚠Experimentalavx512dq

Shift 8-bit mask a left by count bits while shifting in zeros, and store the result in dst.

_kshiftri_mask8^⚠Experimentalavx512dq

Shift 8-bit mask a right by count bits while shifting in zeros, and store the result in dst.

_ktest_mask8_u8^⚠Experimentalavx512dq

Compute the bitwise AND of 8-bit masks a and b, and if the result is all zeros, store 1 in dst, otherwise store 0 in dst. Compute the bitwise NOT of a and then AND with b, if the result is all zeros, store 1 in and_not, otherwise store 0 in and_not.

_ktest_mask16_u8^⚠Experimentalavx512dq

Compute the bitwise AND of 16-bit masks a and b, and if the result is all zeros, store 1 in dst, otherwise store 0 in dst. Compute the bitwise NOT of a and then AND with b, if the result is all zeros, store 1 in and_not, otherwise store 0 in and_not.

_ktestc_mask8_u8^⚠Experimentalavx512dq

Compute the bitwise NOT of 8-bit mask a and then AND with 8-bit mask b, if the result is all zeros, store 1 in dst, otherwise store 0 in dst.

_ktestc_mask16_u8^⚠Experimentalavx512dq

Compute the bitwise NOT of 16-bit mask a and then AND with 16-bit mask b, if the result is all zeros, store 1 in dst, otherwise store 0 in dst.

_ktestz_mask8_u8^⚠Experimentalavx512dq

Compute the bitwise AND of 8-bit masks a and b, if the result is all zeros, store 1 in dst, otherwise store 0 in dst.

_ktestz_mask16_u8^⚠Experimentalavx512dq

Compute the bitwise AND of 16-bit masks a and b, if the result is all zeros, store 1 in dst, otherwise store 0 in dst.

_kxnor_mask8^⚠Experimentalavx512dq

Bitwise XNOR of 8-bit masks a and b, and store the result in dst.

_kxor_mask8^⚠Experimentalavx512dq

Bitwise XOR of 8-bit masks a and b, and store the result in dst.

_load_mask8^⚠Experimentalavx512dq

Load 8-bit mask from memory

_mm256_broadcast_f32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed single-precision (32-bit) floating-point elements from a to all elements of dst.

_mm256_broadcast_f64x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the 2 packed double-precision (64-bit) floating-point elements from a to all elements of dst.

_mm256_broadcast_i32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst.

_mm256_broadcast_i64x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the 2 packed 64-bit integers from a to all elements of dst.

_mm256_cvtepi64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst.

_mm256_cvtepi64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst.

_mm256_cvtepu64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst.

_mm256_cvtepu64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst.

_mm256_cvtpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst.

_mm256_cvtpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst.

_mm256_cvtps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst.

_mm256_cvtps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst.

_mm256_cvttpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst.

_mm256_cvttpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst.

_mm256_cvttps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst.

_mm256_cvttps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst.

_mm256_extractf64x2_pd^⚠Experimentalavx512dq,avx512vl

Extracts 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst.

_mm256_extracti64x2_epi64^⚠Experimentalavx512dq,avx512vl

Extracts 128 bits (composed of 2 packed 64-bit integers) from a, selected with IMM8, and stores the result in dst.

_mm256_fpclass_pd_mask^⚠Experimentalavx512dq,avx512vl

Test packed double-precision (64-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm256_fpclass_ps_mask^⚠Experimentalavx512dq,avx512vl

Test packed single-precision (32-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm256_insertf64x2^⚠Experimentalavx512dq,avx512vl

Copy a to dst, then insert 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from b into dst at the location specified by IMM8.

_mm256_inserti64x2^⚠Experimentalavx512dq,avx512vl

Copy a to dst, then insert 128 bits (composed of 2 packed 64-bit integers) from b into dst at the location specified by IMM8.

_mm256_mask_and_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_and_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_andnot_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_andnot_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_broadcast_f32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed single-precision (32-bit) floating-point elements from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_broadcast_f64x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the 2 packed double-precision (64-bit) floating-point elements from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_broadcast_i32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_broadcast_i64x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the 2 packed 64-bit integers from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtepi64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtepi64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtepu64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtepu64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvtps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvttpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvttpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvttps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_cvttps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_extractf64x2_pd^⚠Experimentalavx512dq,avx512vl

Extracts 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_extracti64x2_epi64^⚠Experimentalavx512dq,avx512vl

Extracts 128 bits (composed of 2 packed 64-bit integers) from a, selected with IMM8, and stores the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_fpclass_pd_mask^⚠Experimentalavx512dq,avx512vl

Test packed double-precision (64-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm256_mask_fpclass_ps_mask^⚠Experimentalavx512dq,avx512vl

Test packed single-precision (32-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm256_mask_insertf64x2^⚠Experimentalavx512dq,avx512vl

Copy a to tmp, then insert 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from b into tmp at the location specified by IMM8, and copy tmp to dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_inserti64x2^⚠Experimentalavx512dq,avx512vl

Copy a to tmp, then insert 128 bits (composed of 2 packed 64-bit integers) from b into tmp at the location specified by IMM8, and copy tmp to dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_mullo_epi64^⚠Experimentalavx512dq,avx512vl

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_or_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_or_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_range_pd^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm256_mask_range_ps^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm256_mask_reduce_pd^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm256_mask_reduce_ps^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm256_mask_xor_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_mask_xor_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm256_maskz_and_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_and_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_andnot_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_andnot_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_broadcast_f32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed single-precision (32-bit) floating-point elements from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_broadcast_f64x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the 2 packed double-precision (64-bit) floating-point elements from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_broadcast_i32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_broadcast_i64x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the 2 packed 64-bit integers from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtepi64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtepi64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtepu64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtepu64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvtps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvttpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvttpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvttps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_cvttps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_extractf64x2_pd^⚠Experimentalavx512dq,avx512vl

Extracts 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_extracti64x2_epi64^⚠Experimentalavx512dq,avx512vl

Extracts 128 bits (composed of 2 packed 64-bit integers) from a, selected with IMM8, and stores the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_insertf64x2^⚠Experimentalavx512dq,avx512vl

Copy a to tmp, then insert 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from b into tmp at the location specified by IMM8, and copy tmp to dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_inserti64x2^⚠Experimentalavx512dq,avx512vl

Copy a to tmp, then insert 128 bits (composed of 2 packed 64-bit integers) from b into tmp at the location specified by IMM8, and copy tmp to dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_mullo_epi64^⚠Experimentalavx512dq,avx512vl

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_or_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_or_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_range_pd^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm256_maskz_range_ps^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm256_maskz_reduce_pd^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm256_maskz_reduce_ps^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm256_maskz_xor_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_maskz_xor_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm256_movepi32_mask^⚠Experimentalavx512dq,avx512vl

Set each bit of mask register k based on the most significant bit of the corresponding packed 32-bit integer in a.

_mm256_movepi64_mask^⚠Experimentalavx512dq,avx512vl

Set each bit of mask register k based on the most significant bit of the corresponding packed 64-bit integer in a.

_mm256_movm_epi32^⚠Experimentalavx512dq,avx512vl

Set each packed 32-bit integer in dst to all ones or all zeros based on the value of the corresponding bit in k.

_mm256_movm_epi64^⚠Experimentalavx512dq,avx512vl

Set each packed 64-bit integer in dst to all ones or all zeros based on the value of the corresponding bit in k.

_mm256_mullo_epi64^⚠Experimentalavx512dq,avx512vl

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst.

_mm256_range_pd^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm256_range_ps^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm256_reduce_pd^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm256_reduce_ps^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm512_and_pd^⚠Experimentalavx512dq

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst.

_mm512_and_ps^⚠Experimentalavx512dq

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst.

_mm512_andnot_pd^⚠Experimentalavx512dq

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst.

_mm512_andnot_ps^⚠Experimentalavx512dq

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst.

_mm512_broadcast_f32x2^⚠Experimentalavx512dq

Broadcasts the lower 2 packed single-precision (32-bit) floating-point elements from a to all elements of dst.

_mm512_broadcast_f32x8^⚠Experimentalavx512dq

Broadcasts the 8 packed single-precision (32-bit) floating-point elements from a to all elements of dst.

_mm512_broadcast_f64x2^⚠Experimentalavx512dq

Broadcasts the 2 packed double-precision (64-bit) floating-point elements from a to all elements of dst.

_mm512_broadcast_i32x2^⚠Experimentalavx512dq

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst.

_mm512_broadcast_i32x8^⚠Experimentalavx512dq

Broadcasts the 8 packed 32-bit integers from a to all elements of dst.

_mm512_broadcast_i64x2^⚠Experimentalavx512dq

Broadcasts the 2 packed 64-bit integers from a to all elements of dst.

_mm512_cvt_roundepi64_pd^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundepi64_ps^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundepu64_pd^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundepu64_ps^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvt_roundps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst. Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_cvtepi64_pd^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst.

_mm512_cvtepi64_ps^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst.

_mm512_cvtepu64_pd^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst.

_mm512_cvtepu64_ps^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst.

_mm512_cvtpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst.

_mm512_cvtpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst.

_mm512_cvtps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst.

_mm512_cvtps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst.

_mm512_cvtt_roundpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_cvtt_roundpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_cvtt_roundps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_cvtt_roundps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_cvttpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst.

_mm512_cvttpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst.

_mm512_cvttps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst.

_mm512_cvttps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst.

_mm512_extractf32x8_ps^⚠Experimentalavx512dq

Extracts 256 bits (composed of 8 packed single-precision (32-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst.

_mm512_extractf64x2_pd^⚠Experimentalavx512dq

Extracts 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst.

_mm512_extracti32x8_epi32^⚠Experimentalavx512dq

Extracts 256 bits (composed of 8 packed 32-bit integers) from a, selected with IMM8, and stores the result in dst.

_mm512_extracti64x2_epi64^⚠Experimentalavx512dq

Extracts 128 bits (composed of 2 packed 64-bit integers) from a, selected with IMM8, and stores the result in dst.

_mm512_fpclass_pd_mask^⚠Experimentalavx512dq

Test packed double-precision (64-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm512_fpclass_ps_mask^⚠Experimentalavx512dq

Test packed single-precision (32-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm512_insertf32x8^⚠Experimentalavx512dq

Copy a to dst, then insert 256 bits (composed of 8 packed single-precision (32-bit) floating-point elements) from b into dst at the location specified by IMM8.

_mm512_insertf64x2^⚠Experimentalavx512dq

Copy a to dst, then insert 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from b into dst at the location specified by IMM8.

_mm512_inserti32x8^⚠Experimentalavx512dq

Copy a to dst, then insert 256 bits (composed of 8 packed 32-bit integers) from b into dst at the location specified by IMM8.

_mm512_inserti64x2^⚠Experimentalavx512dq

Copy a to dst, then insert 128 bits (composed of 2 packed 64-bit integers) from b into dst at the location specified by IMM8.

_mm512_mask_and_pd^⚠Experimentalavx512dq

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_and_ps^⚠Experimentalavx512dq

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_andnot_pd^⚠Experimentalavx512dq

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_andnot_ps^⚠Experimentalavx512dq

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_broadcast_f32x2^⚠Experimentalavx512dq

Broadcasts the lower 2 packed single-precision (32-bit) floating-point elements from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_broadcast_f32x8^⚠Experimentalavx512dq

Broadcasts the 8 packed single-precision (32-bit) floating-point elements from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_broadcast_f64x2^⚠Experimentalavx512dq

Broadcasts the 2 packed double-precision (64-bit) floating-point elements from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_broadcast_i32x2^⚠Experimentalavx512dq

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_broadcast_i32x8^⚠Experimentalavx512dq

Broadcasts the 8 packed 32-bit integers from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_broadcast_i64x2^⚠Experimentalavx512dq

Broadcasts the 2 packed 64-bit integers from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvt_roundepi64_pd^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundepi64_ps^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundepu64_pd^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundepu64_ps^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvt_roundps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_mask_cvtepi64_pd^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtepi64_ps^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtepu64_pd^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtepu64_ps^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvtt_roundpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_mask_cvtt_roundpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_mask_cvtt_roundps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_mask_cvtt_roundps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_mask_cvttpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvttpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvttps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_cvttps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_extractf32x8_ps^⚠Experimentalavx512dq

Extracts 256 bits (composed of 8 packed single-precision (32-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_extractf64x2_pd^⚠Experimentalavx512dq

Extracts 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_extracti32x8_epi32^⚠Experimentalavx512dq

Extracts 256 bits (composed of 8 packed 32-bit integers) from a, selected with IMM8, and stores the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_extracti64x2_epi64^⚠Experimentalavx512dq

Extracts 128 bits (composed of 2 packed 64-bit integers) from a, selected with IMM8, and stores the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_fpclass_pd_mask^⚠Experimentalavx512dq

Test packed double-precision (64-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm512_mask_fpclass_ps_mask^⚠Experimentalavx512dq

Test packed single-precision (32-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm512_mask_insertf32x8^⚠Experimentalavx512dq

Copy a to tmp, then insert 256 bits (composed of 8 packed single-precision (32-bit) floating-point elements) from b into tmp at the location specified by IMM8, and copy tmp to dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_insertf64x2^⚠Experimentalavx512dq

Copy a to tmp, then insert 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from b into tmp at the location specified by IMM8, and copy tmp to dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_inserti32x8^⚠Experimentalavx512dq

Copy a to tmp, then insert 256 bits (composed of 8 packed 32-bit integers) from b into tmp at the location specified by IMM8, and copy tmp to dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_inserti64x2^⚠Experimentalavx512dq

Copy a to tmp, then insert 128 bits (composed of 2 packed 64-bit integers) from b into tmp at the location specified by IMM8, and copy tmp to dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_mullo_epi64^⚠Experimentalavx512dq

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_or_pd^⚠Experimentalavx512dq

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_or_ps^⚠Experimentalavx512dq

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_range_pd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_mask_range_ps^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_mask_range_round_pd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm512_mask_range_round_ps^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_mask_reduce_pd^⚠Experimentalavx512dq

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_mask_reduce_ps^⚠Experimentalavx512dq

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_mask_reduce_round_pd^⚠Experimentalavx512dq

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_mask_reduce_round_ps^⚠Experimentalavx512dq

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_mask_xor_pd^⚠Experimentalavx512dq

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_mask_xor_ps^⚠Experimentalavx512dq

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm512_maskz_and_pd^⚠Experimentalavx512dq

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_and_ps^⚠Experimentalavx512dq

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_andnot_pd^⚠Experimentalavx512dq

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_andnot_ps^⚠Experimentalavx512dq

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_broadcast_f32x2^⚠Experimentalavx512dq

Broadcasts the lower 2 packed single-precision (32-bit) floating-point elements from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_broadcast_f32x8^⚠Experimentalavx512dq

Broadcasts the 8 packed single-precision (32-bit) floating-point elements from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_broadcast_f64x2^⚠Experimentalavx512dq

Broadcasts the 2 packed double-precision (64-bit) floating-point elements from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_broadcast_i32x2^⚠Experimentalavx512dq

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_broadcast_i32x8^⚠Experimentalavx512dq

Broadcasts the 8 packed 32-bit integers from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_broadcast_i64x2^⚠Experimentalavx512dq

Broadcasts the 2 packed 64-bit integers from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvt_roundepi64_pd^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundepi64_ps^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundepu64_pd^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundepu64_ps^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvt_roundps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Rounding is done according to the ROUNDING parameter, which can be one of:

_mm512_maskz_cvtepi64_pd^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtepi64_ps^⚠Experimentalavx512dq

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtepu64_pd^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtepu64_ps^⚠Experimentalavx512dq

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvtt_roundpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_maskz_cvtt_roundpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_maskz_cvtt_roundps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_maskz_cvtt_roundps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set). Exceptions can be suppressed by passing _MM_FROUND_NO_EXC to the sae parameter.

_mm512_maskz_cvttpd_epi64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvttpd_epu64^⚠Experimentalavx512dq

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding

_mm512_maskz_cvttps_epi64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_cvttps_epu64^⚠Experimentalavx512dq

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_extractf32x8_ps^⚠Experimentalavx512dq

Extracts 256 bits (composed of 8 packed single-precision (32-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_extractf64x2_pd^⚠Experimentalavx512dq

Extracts 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from a, selected with IMM8, and stores the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_extracti32x8_epi32^⚠Experimentalavx512dq

Extracts 256 bits (composed of 8 packed 32-bit integers) from a, selected with IMM8, and stores the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_extracti64x2_epi64^⚠Experimentalavx512dq

Extracts 128 bits (composed of 2 packed 64-bit integers) from a, selected with IMM8, and stores the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_insertf32x8^⚠Experimentalavx512dq

Copy a to tmp, then insert 256 bits (composed of 8 packed single-precision (32-bit) floating-point elements) from b into tmp at the location specified by IMM8, and copy tmp to dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_insertf64x2^⚠Experimentalavx512dq

Copy a to tmp, then insert 128 bits (composed of 2 packed double-precision (64-bit) floating-point elements) from b into tmp at the location specified by IMM8, and copy tmp to dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_inserti32x8^⚠Experimentalavx512dq

Copy a to tmp, then insert 256 bits (composed of 8 packed 32-bit integers) from b into tmp at the location specified by IMM8, and copy tmp to dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_inserti64x2^⚠Experimentalavx512dq

Copy a to tmp, then insert 128 bits (composed of 2 packed 64-bit integers) from b into tmp at the location specified by IMM8, and copy tmp to dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_mullo_epi64^⚠Experimentalavx512dq

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_or_pd^⚠Experimentalavx512dq

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_or_ps^⚠Experimentalavx512dq

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_range_pd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_maskz_range_ps^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_maskz_range_round_pd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm512_maskz_range_round_ps^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_maskz_reduce_pd^⚠Experimentalavx512dq

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_maskz_reduce_ps^⚠Experimentalavx512dq

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_maskz_reduce_round_pd^⚠Experimentalavx512dq

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_maskz_reduce_round_ps^⚠Experimentalavx512dq

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm512_maskz_xor_pd^⚠Experimentalavx512dq

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_maskz_xor_ps^⚠Experimentalavx512dq

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm512_movepi32_mask^⚠Experimentalavx512dq

Set each bit of mask register k based on the most significant bit of the corresponding packed 32-bit integer in a.

_mm512_movepi64_mask^⚠Experimentalavx512dq

Set each bit of mask register k based on the most significant bit of the corresponding packed 64-bit integer in a.

_mm512_movm_epi32^⚠Experimentalavx512dq

Set each packed 32-bit integer in dst to all ones or all zeros based on the value of the corresponding bit in k.

_mm512_movm_epi64^⚠Experimentalavx512dq

Set each packed 64-bit integer in dst to all ones or all zeros based on the value of the corresponding bit in k.

_mm512_mullo_epi64^⚠Experimentalavx512dq

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst.

_mm512_or_pd^⚠Experimentalavx512dq

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst.

_mm512_or_ps^⚠Experimentalavx512dq

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst.

_mm512_range_pd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_range_ps^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm512_range_round_pd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm512_range_round_ps^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm512_reduce_pd^⚠Experimentalavx512dq

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm512_reduce_ps^⚠Experimentalavx512dq

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm512_reduce_round_pd^⚠Experimentalavx512dq

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm512_reduce_round_ps^⚠Experimentalavx512dq

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm512_xor_pd^⚠Experimentalavx512dq

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst.

_mm512_xor_ps^⚠Experimentalavx512dq

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst.

_mm_broadcast_i32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst.

_mm_cvtepi64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst.

_mm_cvtepi64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst.

_mm_cvtepu64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst.

_mm_cvtepu64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst.

_mm_cvtpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst.

_mm_cvtpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst.

_mm_cvtps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst.

_mm_cvtps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst.

_mm_cvttpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst.

_mm_cvttpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst.

_mm_cvttps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst.

_mm_cvttps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst.

_mm_fpclass_pd_mask^⚠Experimentalavx512dq,avx512vl

Test packed double-precision (64-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm_fpclass_ps_mask^⚠Experimentalavx512dq,avx512vl

Test packed single-precision (32-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm_fpclass_sd_mask^⚠Experimentalavx512dq

Test the lower double-precision (64-bit) floating-point element in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm_fpclass_ss_mask^⚠Experimentalavx512dq

Test the lower single-precision (32-bit) floating-point element in a for special categories specified by imm8, and store the results in mask vector k. imm can be a combination of:

_mm_mask_and_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_and_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_andnot_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_andnot_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_broadcast_i32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtepi64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtepi64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtepu64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtepu64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvtps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvttpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvttpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvttps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_cvttps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_fpclass_pd_mask^⚠Experimentalavx512dq,avx512vl

Test packed double-precision (64-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm_mask_fpclass_ps_mask^⚠Experimentalavx512dq,avx512vl

Test packed single-precision (32-bit) floating-point elements in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm_mask_fpclass_sd_mask^⚠Experimentalavx512dq

Test the lower double-precision (64-bit) floating-point element in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm_mask_fpclass_ss_mask^⚠Experimentalavx512dq

Test the lower single-precision (32-bit) floating-point element in a for special categories specified by imm8, and store the results in mask vector k using zeromask k1 (elements are zeroed out when the corresponding mask bit is not set). imm can be a combination of:

_mm_mask_mullo_epi64^⚠Experimentalavx512dq,avx512vl

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_or_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_or_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_range_pd^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_mask_range_ps^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_mask_range_round_sd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower double-precision (64-bit) floating-point element in a and b, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm_mask_range_round_ss^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower single-precision (32-bit) floating-point element in a and b, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper 3 packed elements from a to the upper elements of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm_mask_range_sd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower double-precision (64-bit) floating-point element in a and b, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_mask_range_ss^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower single-precision (32-bit) floating-point element in a and b, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper 3 packed elements from a to the upper elements of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_mask_reduce_pd^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm_mask_reduce_ps^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using writemask k (elements are copied from src to dst if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm_mask_reduce_round_sd^⚠Experimentalavx512dq

Extract the reduced argument of the lower double-precision (64-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_mask_reduce_round_ss^⚠Experimentalavx512dq

Extract the reduced argument of the lower single-precision (32-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_mask_reduce_sd^⚠Experimentalavx512dq

Extract the reduced argument of the lower double-precision (64-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_mask_reduce_ss^⚠Experimentalavx512dq

Extract the reduced argument of the lower single-precision (32-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using writemask k (the element is copied from src when mask bit 0 is not set), and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_mask_xor_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_mask_xor_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using writemask k (elements are copied from src if the corresponding bit is not set).

_mm_maskz_and_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_and_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise AND of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_andnot_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed double-precision (64-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_andnot_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise NOT of packed single-precision (32-bit) floating point numbers in a and then bitwise AND with b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_broadcast_i32x2^⚠Experimentalavx512dq,avx512vl

Broadcasts the lower 2 packed 32-bit integers from a to all elements of dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtepi64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtepi64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed signed 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtepu64_pd^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed double-precision (64-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtepu64_ps^⚠Experimentalavx512dq,avx512vl

Convert packed unsigned 64-bit integers in a to packed single-precision (32-bit) floating-point elements, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvtps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers, and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvttpd_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvttpd_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed double-precision (64-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvttps_epi64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed signed 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_cvttps_epu64^⚠Experimentalavx512dq,avx512vl

Convert packed single-precision (32-bit) floating-point elements in a to packed unsigned 64-bit integers with truncation, and store the result in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_mullo_epi64^⚠Experimentalavx512dq,avx512vl

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_or_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_or_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise OR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_range_pd^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_maskz_range_ps^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_maskz_range_round_sd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower double-precision (64-bit) floating-point element in a and b, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm_maskz_range_round_ss^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower single-precision (32-bit) floating-point element in a and b, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper 3 packed elements from a to the upper elements of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm_maskz_range_sd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower double-precision (64-bit) floating-point element in a and b, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_maskz_range_ss^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower single-precision (32-bit) floating-point element in a and b, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper 3 packed elements from a to the upper elements of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_maskz_reduce_pd^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm_maskz_reduce_ps^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst using zeromask k (elements are zeroed out if the corresponding mask bit is not set). Rounding is done according to the imm8 parameter, which can be one of:

_mm_maskz_reduce_round_sd^⚠Experimentalavx512dq

Extract the reduced argument of the lower double-precision (64-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_maskz_reduce_round_ss^⚠Experimentalavx512dq

Extract the reduced argument of the lower single-precision (32-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_maskz_reduce_sd^⚠Experimentalavx512dq

Extract the reduced argument of the lower double-precision (64-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper element from a to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_maskz_reduce_ss^⚠Experimentalavx512dq

Extract the reduced argument of the lower single-precision (32-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using zeromask k (the element is zeroed out when mask bit 0 is not set), and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_maskz_xor_pd^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed double-precision (64-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_maskz_xor_ps^⚠Experimentalavx512dq,avx512vl

Compute the bitwise XOR of packed single-precision (32-bit) floating point numbers in a and b and store the results in dst using zeromask k (elements are zeroed out if the corresponding bit is not set).

_mm_movepi32_mask^⚠Experimentalavx512dq,avx512vl

Set each bit of mask register k based on the most significant bit of the corresponding packed 32-bit integer in a.

_mm_movepi64_mask^⚠Experimentalavx512dq,avx512vl

Set each bit of mask register k based on the most significant bit of the corresponding packed 64-bit integer in a.

_mm_movm_epi32^⚠Experimentalavx512dq,avx512vl

Set each packed 32-bit integer in dst to all ones or all zeros based on the value of the corresponding bit in k.

_mm_movm_epi64^⚠Experimentalavx512dq,avx512vl

Set each packed 64-bit integer in dst to all ones or all zeros based on the value of the corresponding bit in k.

_mm_mullo_epi64^⚠Experimentalavx512dq,avx512vl

Multiply packed 64-bit integers in a and b, producing intermediate 128-bit integers, and store the low 64 bits of the intermediate integers in dst.

_mm_range_pd^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed double-precision (64-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_range_ps^⚠Experimentalavx512dq,avx512vl

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for packed single-precision (32-bit) floating-point elements in a and b, and store the results in dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit.

_mm_range_round_sd^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower double-precision (64-bit) floating-point element in a and b, store the result in the lower element of dst, and copy the upper element from a to the upper element of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm_range_round_ss^⚠Experimentalavx512dq

Calculate the max, min, absolute max, or absolute min (depending on control in imm8) for the lower single-precision (32-bit) floating-point element in a and b, store the result in the lower element of dst, and copy the upper 3 packed elements from a to the upper elements of dst. Lower 2 bits of IMM8 specifies the operation control: 00 = min, 01 = max, 10 = absolute min, 11 = absolute max. Upper 2 bits of IMM8 specifies the sign control: 00 = sign from a, 01 = sign from compare result, 10 = clear sign bit, 11 = set sign bit. Exceptions can be suppressed by passing _MM_FROUND_NO_EXC in the sae parameter.

_mm_reduce_pd^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed double-precision (64-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_reduce_ps^⚠Experimentalavx512dq,avx512vl

Extract the reduced argument of packed single-precision (32-bit) floating-point elements in a by the number of bits specified by imm8, and store the results in dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_reduce_round_sd^⚠Experimentalavx512dq

Extract the reduced argument of the lower double-precision (64-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst, and copy the upper element from a to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_reduce_round_ss^⚠Experimentalavx512dq

Extract the reduced argument of the lower single-precision (32-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst, and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_reduce_sd^⚠Experimentalavx512dq

Extract the reduced argument of the lower double-precision (64-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst using, and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_mm_reduce_ss^⚠Experimentalavx512dq

Extract the reduced argument of the lower single-precision (32-bit) floating-point element in b by the number of bits specified by imm8, store the result in the lower element of dst, and copy the upper element from a. to the upper element of dst. Rounding is done according to the imm8 parameter, which can be one of:

_store_mask8^⚠Experimentalavx512dq

Store 8-bit mask to memory